Memory, Logic and Logic in Memory Using Three Terminal Magnetic Tunnel Junctions

Modern processors dissipate at least 100× more energy when reading memory than performing simple arithmetic. The origin of this "memory wall" is the increasing gap between processor and memory speeds. Systems dissipate power making up for this speed gap with support logic such as caches, and further power is consumed in unused processor cycles while waiting for memory. One potential solution is to use spin rather than charge to store and process information. The dual capabilities of spintronics in logic and memory will be used to address the "memory wall" in two tasks: first by reducing memory write times from ~10ns to 1-10ps, and second by incorporating some logical functions directly within memory arrays. The focus will be to demonstrate multiply and accumulate circuits the foundation of all logic systems, but optimized here for convolutional neural networks. Industrial connections will be fostered through research visits from industrial researchers and the placement of students for internships and eventual employment. The additional aims of the educational mission are: 1) to inspire career interest of K-12 students in science and engineering; 2) to provide undergraduate students with cutting-edge research opportunities; and 3) to prepare students for future engineering careers through curriculum development and interdisciplinary collaboration.

The technical goals of this program will be realized using new techniques for the interrogation and electrical manipulation of synthetic antiferromagnets, thereby enhancing the speed of magnetic tunnel junction logic and memory. Overcoming the material challenges of integrating topological and magnetic insulators will reduce the energy dissipation towards thermodynamic limits. The combination of low switching energy via efficient spin current generation in topological insulators, and fast switching in synthetic antiferromagnets is expected to deliver energy-delay products.